Digital System Design using Logical Expression (Data Flow Modelling Style)-
Sample Codes-
Sample Codes-
- Simple AND Gate Desing using VHDL.
- Logical Operators Test in VHDL Design.
- Half Adder Desing Using logical expressions (VHDL Code).
- Full Adder Design Using logical expressions (VHDL Code).
- 4 : 1 Multiplexer Design using Logical Expressions (VHDL Code).
- 1 : 4 Demultiplexer Design using Logical Gates (VHDL Code).
- 2 : 4 Decoder Design using Logical Gates (VHDL Code).
- 4 : 2 Encoder Design using Logical Gates (VHDL Code).
- Half Subtractor Design using Logical Expression (VHDL Code).
- Full Subtractor Design using Logical Gates (VHDL Code).
- Design of 1 bit Comparator using Logical Gates (VHDL Code).
- Design of Binary to Gray Converter using Data Flow Modeling Style.
- Design of Gray to Binary Converter using Logical Gates (VHDL Code).
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