Design of 8 : 3 Priority Encoder using std_match function and if - else statements (VHDL Code).

Design of 8 : 3 Priority Encoder using    std_match   function and if - else statements -

Output Waveform : 8 to 3 Priority Encoder

Output Waveform : 8 to 3 Priority Encoder

VHDL Code -


-------------------------------------------------------------------------------
--
-- Title       : priority_encoder_8_3
-- Design      : vhdl_upload2
-- Author      : Naresh Singh Dobal
-- Company     : nsdobal@gmail.com
-- Verilog HDL Programs &  Exercise with Naresh Singh Dobal.
--
-------------------------------------------------------------------------------
--
-- File        : Design of Priority Encoder using if else statements.vhd

   

library IEEE;
use IEEE.STD_LOGIC_1164.all;     
use ieee.numeric_std.all;

entity priority_encoder_8_3 is
     port(
         din : in STD_LOGIC_VECTOR(7 downto 0);
         dout : out STD_LOGIC_VECTOR(2 downto 0)
         );
end priority_encoder_8_3;


architecture priority_enc_arc of priority_encoder_8_3 is
begin

    pri_enc : process (din) is
    begin
        if (std_match(din,"1-------")) then
            dout <= "000";
        elsif (std_match(din,"01------")) then
            dout <= "001";
        elsif (std_match(din,"001-----")) then
            dout <= "010";
        elsif (std_match(din,"0001----")) then
            dout <= "011";
        elsif (std_match(din,"00001---")) then
            dout <= "100";
        elsif (std_match(din,"000001--")) then
            dout <= "101";
        elsif (std_match(din,"0000001-")) then
            dout <= "110";
        elsif (std_match(din,"00000001")) then
            dout <= "111";
        end if;
    end process pri_enc;
   

end priority_enc_arc;