VHDL Programming: Basics of VHDL Language Execution process concurrent and sequential

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Basics of VHDL Execution Process (Concurrent and Sequential)

In this comprehensive tutorial, we will cover everything you need to know about VHDL sequential and concurrent statements. Sequential statements allow us to execute code in a step-by-step manner, while concurrent statements offer a more parallel execution approach. Welcome to this beginner's guide on VHDL basics, where we will dive into the concepts of sequential and concurrent statements in VHDL. If you've ever been confused about these fundamental aspects of VHDL programming, this video is perfect for you. We will start by explaining the differences between sequential and concurrent statements, providing clear examples and illustrations to eliminate any confusion. By the end of this video, you will have a solid understanding of how to effectively utilize sequential and concurrent statements in your VHDL designs. This guide is suitable for beginners who have some basic knowledge of VHDL. We will go step-by-step and explain each concept thoroughly, ensuring that you grasp the fundamentals before moving on to more advanced topics. Make sure to subscribe to our channel for more informative videos on VHDL programming and digital design. Don't forget to hit the notification bell to stay updated with our latest uploads. If you have any questions or suggestions, feel free to leave them in the comments section below.

Before start writing of codes in VHDL for digital systems you must know about the execution of VHDL language, you should know that how the tools process the VHDL code. This is a very important concept you should understand for proficiency in VHDL.

VHDL can be programmed in following execution pattern.

1.Concurrent Execution.

2.Sequential Execution.

VHDL can work on –

1.Concurrent Statements.

2.Sequential Statements.

3.Net-List Language.

4.Timing Specification.

5.Waveform Generation Language.

Sequential statements are very much like software languages. These statements execute sequentially that means at the start statement 1 will execute and then statement 2 will execute than statement 3 will execute and so on.

This means that sequential statements must be in correct order, just like the flow-charts we have in software. Let’s understand this with a simple example.

If (a=b) then

eq <= ‘1’;

Else

eq <= ‘0’;

End if;

We also have the concurrent statements in VHDL, these statements are very likely to a hardware model like a schematic design. All the concurrent statements execute simultaneously, just like hardware.

So if you have Concurrent statement 1 and statement 2 and 3 and 4 and so on… and all these statements executes concurrently, which means when the concurrent statement 1 is executing at the same time statement 4 is executing, similarly at the same time statement 2 or statement 3 are executing. I mean all are executing at the same time, so this is important to know that the sequence or order of the statements not really matter if your statement executing concurrently, and you can write them anywhere within the architecture without thinking of the sequence. And the results will be the same.

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Net list language –

Net list language is also working on Concurrent execution. But only the difference is in net list language we design our system by defining the basic elements like gates or collection of gates (called modules and registers).

** Above three languages are used for designing purpose.

Other two languages i.e. Timing specification and waveform generation language are used for verification purpose. In brief-

Timing Specification - we can define the flow of data from input to output in our simulation screen but again this cannot be implemented in real life hardware because you can't specify the time of flow of data. So timing specification language only use in writing of test benches. Same a waveform generation language,

Is used for creation of waveforms, basically this is a algorithm to get the same output by minimizing the processing time.