Design of 8 : 3 Priority Encoder using std_match function & When - Else
Output Waveform : 8 : 3 Priority Encoder |
Output Waveform : 8 : 3 Priority Encoder |
VHDL Code -
-------------------------------------------------------------------------------
--
-- Title : priority_encoder_8_3
-- Design : vhdl_upload2
-- Author : Naresh Singh Dobal
-- Company : nsdobal@gmail.com
-- Verilog HDL Programs & Exercise with Naresh Singh Dobal.
--
-------------------------------------------------------------------------------
--
-- File : Design of 8 to 3 Priority Encoder using when else.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
entity priority_encoder_8_3 is
port(
din : in STD_LOGIC_VECTOR(7 downto 0);
dout : out STD_LOGIC_VECTOR(2 downto 0)
);
end priority_encoder_8_3;
architecture priority_enc_arc of priority_encoder_8_3 is
begin
dout <= "000" when std_match (din,"1-------") else
"001" when std_match (din,"01------") else
"010" when std_match (din,"001-----") else
"011" when std_match (din,"0001----") else
"100" when std_match (din,"00001---") else
"101" when std_match (din,"000001--") else
"110" when std_match (din,"0000001-") else
"111" when std_match (din,"00000001");
end priority_enc_arc;
No comments:
Post a Comment