Design of Gray to Binary Code Conveter using Logical Gates (Data Flow Modeling Style)-
Program-
-------------------------------------------------------------------------------
--
-- Title : Gray_to_Binary
-- Design : vhdl_test
-- Author : Naresh Singh Dobal
-- Company : nsd
--
-------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.all;
entity Gray_to_Binary is
port(
din : in STD_LOGIC_VECTOR(3 downto 0);
dout : out STD_LOGIC_VECTOR(3 downto 0)
);
end Gray_to_Binary;
architecture Gray_to_Binary_arc of Gray_to_Binary is
begin
dout(3) <= din(3);
dout(2) <= din(3) xor din(2);
dout(1) <= din(3) xor din(2) xor din(1);
dout(0) <= din(3) xor din(2) xor din(1) xor din(0);
end Gray_to_Binary_arc;
Output Waveform : Gray to Binary Code Converter |
Program-
-------------------------------------------------------------------------------
--
-- Title : Gray_to_Binary
-- Design : vhdl_test
-- Author : Naresh Singh Dobal
-- Company : nsd
--
-------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.all;
entity Gray_to_Binary is
port(
din : in STD_LOGIC_VECTOR(3 downto 0);
dout : out STD_LOGIC_VECTOR(3 downto 0)
);
end Gray_to_Binary;
architecture Gray_to_Binary_arc of Gray_to_Binary is
begin
dout(3) <= din(3);
dout(2) <= din(3) xor din(2);
dout(1) <= din(3) xor din(2) xor din(1);
dout(0) <= din(3) xor din(2) xor din(1) xor din(0);
end Gray_to_Binary_arc;
Logic of conversion is wrong
ReplyDeleteWhy is the logic of conversion wrong???
ReplyDelete