VHDL Lab Excercise ::: Exercise 3

VHDL Lab Exercise   :::   Exercise 3 -

LAB 3 : COMBINATIONAL SYSTEM DESIGN USING BEHAVIOR MODELLING STYLE.

Lab Exercise 3 :  VHDL with Naresh Singh Dobal Learning Series.

Lab Exercise 3-b ::  VHDL with Naresh Singh Dobal Learning Series.

Task1 :      Write a VHDL code for Full adder using if-else.

Task2:       Write a VHDL code for Full subtractor using if-else.

Task3:       Write a VHDL code for 4:1 Multiplexer using if-else.

Task4:       Write a VHDL code for 1:4 Demultiplexer using if-else.

Task5:       Write a VHDL code for a 8:3 Encoder using if-else.

Task6:       Write a VHDL code for a 3:8 Decoder using if-else.

Task7:       Write a VHDL code for Full adder using case.

Task8 :      Write a VHDL code for Full subtractor using case.

Task9:       Write a VHDL code for 4:1 Multiplexer using case.

Task10:     Write a VHDL code for 1:4 Demultiplexer using case.

Task11:     Write a VHDL code for 8:3 Encoder using case.

Task12:     Write a VHDL code for 3:8 Decoder using case.

Task13:     Write a VHDL code for 3 bit comparator using if-else.

Task14:     Write a VHDL code for BINARY TO GRAY converter using if-else.

Task15:     Write a VHDL code for GRAY TO BINARY converter using case.

If you feel any difficulties in any assignment then follow the below link...

Solutions for problems in if-else statements.

Solution for problems in case statements.

I would love to read your suggestions and comments here below.

My name is Naresh Singh Dobal, for any query contact us at nsdobal@gmail.com