Monday, 15 July 2013

Design of 3 : 8 Decoder Using When-Else Statement (VHDL Code).

Design of 3 : 8 Decoder Using When - Else Statement (Data Flow Modeling Style)-


Output Waveform : 3 : 8 Decoder



VHDL Code-



-------------------------------------------------------------------------------
--
-- Title       : decoder3_8
-- Design      : vhdl_test
-- Author      : Naresh Singh Dobal
-- Company     : nsd
--
-------------------------------------------------------------------------------
--
-- File        : 3 : 8 Decoder using when else.vhd

   

library IEEE;
use IEEE.STD_LOGIC_1164.all;

entity decoder3_8 is
     port(
         din : in STD_LOGIC_VECTOR(2 downto 0);
         dout : out STD_LOGIC_VECTOR(7 downto 0)
         );
end decoder3_8;


architecture decoder3_8_arc of decoder3_8 is
begin

    dout <= ("10000000") when (din="000") else
            ("01000000") when (din="001") else
            ("00100000") when (din="010") else
            ("00010000") when (din="011") else
            ("00001000") when (din="100") else
            ("00000100") when (din="101") else
            ("00000010") when (din="110") else
            ("00000001") ;

end decoder3_8_arc;

7 comments :

Anonymous said...

Very helpfull, exactly what I needed. This was the only place with a intuitive simulation and the VHDL was very simple. Thank you

BOOBALAN HEL said...

it's very useful...thanks a lot...\

Anonymous said...

it is very useful. but if u provide with logic symbols and truth tables it would be more useful

Anonymous said...

sir i found some ambiguity in ur code.Logically when the input is ooo then lsb should go high instead of msb.Correct me if i am wrong and please reply.

Unknown said...

hi

rishabh pandey said...
This comment has been removed by the author.
Anonymous said...

Thank you :)

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