Monday, 15 July 2013

Design of 1 : 8 Demultiplexer Using When-Else (VHDL Code).

Design of 1 : 8 Demultiplexer Using When - Else Concurrent Statement (Data Flow Modeling Style)-

Output Waveform : 1 : 8 Demultiplexer


Program-


-------------------------------------------------------------------------------
--
-- Title       : demultiplexer1_8
-- Design      : vhdl_test
-- Author      : Naresh Singh Dobal
-- Company     : nsd
--
-------------------------------------------------------------------------------
--
-- File        : 1 : 8 Demultiplexer using When-Else.vhd

   

library IEEE;
use IEEE.STD_LOGIC_1164.all;

entity demultiplexer1_8 is
     port(
         din : in STD_LOGIC;
         sel : in STD_LOGIC_VECTOR(2 downto 0);
         dout : out STD_LOGIC_VECTOR(7 downto 0)
         );
end demultiplexer1_8;

architecture demultiplexer1_8_arc of demultiplexer1_8 is
begin
   
    dout <= (din & "0000000") when (sel="000") else
            ('0' & din & "000000") when (sel="001") else
            ("00" & din & "00000") when (sel="010") else
            ("000" & din & "0000") when (sel="011") else
            ("0000" & din & "000") when (sel="100") else
            ("00000" & din & "00") when (sel="101") else
            ("000000" & din & '0') when (sel="110") else
            ("0000000" & din) ;
   

end demultiplexer1_8_arc;

5 comments :

Sayan Mukherjee said...

and simulation code???

vaishnavi said...

Its not a right one...

vaishnavi said...

sorry its correct

Unknown said...

How to write it with behavioral modeling style?!!!

Sergios Antequera said...

library ieee;
use ieee.std_logic_1164.all;

entity TBdemux_when is
end TBdemux_when;

architecture TBdemux1a4_when of TBdemux_when is
signal TB_SEL: std_logic_vector(1 downto 0);
signal TB_DE: std_logic;
signal TB_DS:std_logic_vector(3 downto 0);

begin
demux1: entity work.demux1a4_when
port map(SEL =>TB_SEL,
DE =>TB_DE,
DS =>TB_DS);
process
begin


TB_SEL <= "00";
TB_DE <='1';
wait for 50 ns;

TB_SEL <= "01";
TB_DE <='1';
wait for 50 ns;

TB_SEL <= "10";
TB_DE <='1';
wait for 50 ns;

TB_SEL <= "11";
TB_DE <='1';
wait for 50 ns;

TB_SEL <= "00";
TB_DE <='0';
wait for 50 ns;

TB_SEL <= "01";
TB_DE <='0';
wait for 50 ns;

TB_SEL <= "10";
TB_DE <='0';
wait for 50 ns;

TB_SEL <= "11";
TB_DE <='0';
wait for 50 ns;

end process;
end TBdemux1a4_when;

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